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Instruction set architecture
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#	Item
961	Exploiting SIMD Instructions Felix von Leitner CCC Berlin [removed] August 2003 Abstract Add to Reading List Source URL: www.fefe.de Language: English - Date: 2003-08-09 07:30:57 Parallel computing Classes of computers Central processing unit X86 instructions SIMD X86 MMX Instruction set DEC Alpha Computer architecture Computing Instruction set architectures
962	8/16-bit XMEGA A1 Microcontroller ATxmega128A1 / ATxmega64A1 Not recommended for new designs - Preliminary Add to Reading List Source URL: www.atmel.com Language: English - Date: 2014-10-13 09:34:07 Electronic engineering Central processing unit Embedded systems Instruction set architectures Atmel AVR Norwegian Institute of Technology Joint Test Action Group CPU design Instruction set Computer architecture Microcontrollers Computer hardware
963	nuss_buildp_build_cortex_a82.10344_cortex_a8_trmphics_to_timing_diagram_conventions.svg Add to Reading List Source URL: infocenter.arm.com Language: English Central processing unit Instruction set architectures Debugging Programming idioms ARM architecture X86 debug register SIMD Debug Processor register Computing Computer programming Computer architecture
964	The Impact of Communication Style on Machine Resource Usage for the iWarp Parallel Processor T. Gross, A. Hasegawa, S. Hinrichs, D. O’Hallaron, and T. Stricker November, 1992 CMU-CS[removed] Add to Reading List Source URL: www.cs.inf.ethz.ch Language: English - Date: 1997-01-16 13:50:32 Central processing unit Computer architecture IWarp WARP Microprocessors Instruction set CPU cache Process Microarchitecture Computing Parallel computing Supercomputers
965	2013 Intel Solutions Summit Form Factor Solution Innovation Award Add to Reading List Source URL: net.eurocom.com Language: English - Date: 2013-09-06 12:27:08 Xeon Computer architecture Workstation Instruction set architectures Intel Core Computer hardware Intel Computing
966	- - PLAINTIFF’S EXHIBIT Add to Reading List Source URL: www.groklaw.net Language: English - Date: 2007-01-17 17:10:57 Reduced instruction set computing Windows API OS/2 Microsoft Windows Windows NT Computer architecture Software Computing
967	Cloud Data Analytics Gateways Add to Reading List Source URL: www.intel.co.il Language: English - Date: 2014-05-16 19:50:49 X86 architecture Smartphones Ambient intelligence Internet of Things Intel McAfee X86 virtualization Cloud computing AES instruction set System software Computing Software
968	64bit SMP NetBSD OS Porting for TILE-Gx VLIW Many-Core Processor Toru Nishimura Sanctum Networks, Pvt. Ltd. [removed] Add to Reading List Source URL: 2013.asiabsdcon.org Language: English - Date: 2014-01-03 03:46:16 Microprocessors Central processing unit Parallel computing Instruction set architectures Computer memory TILE64 CPU cache TILE-Gx Thread Computer architecture Computer hardware Computing
969	SIMD Assembly Tutorial: ARM NEON Mozilla Motivation Add to Reading List Source URL: people.xiph.org Language: English - Date: 2013-10-02 17:54:22 Parallel computing ARM architecture SIMD Link register Calling convention TI-990 Computer architecture Computing Instruction set architectures
970	Location-Based Memory Fences Edya Ladan-Mozes I-Ting Angelina Lee Dmitry Vyukov∗ Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:50 Computer memory Central processing unit Concurrency control Instruction set architectures CPU cache Memory barrier Parallel computing Linearizability Cache Computer architecture Computing Computer hardware

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